Hello Hooman,
We also have some problems implementing the power supply for this device. There is a relation defined for the different power supplies. VDDD should be greater then VDDA and VDDD should be greater then VDDLVDS. And then some schematic is drawn in figure 3 how to do this. But that is all that I find in the datasheet.
Are there tolerances on this rule?
Is it only for power sequencing (can we use different regulators for this)?
What are the values of the components in figure 3 ?
What is the maximum ripple allowed on this device? (if I follow the operation conditions then the chip will work with a ripple of 0.6V, I don't find the PSRR either)
Kind regards,
Koen