Forum Post: 2-wire LMT86

Hi,
I report here a 2-wire connection to LMT86, using only the GND and Vs lines.
The Vs line connects a commutable port of a MCU with the output of the LMT86,
thru an 1k current limiting resistor.
The dominant state of the port is high level output state(+5V).
The supply is provided locally by means of a 10uF high temperature tantalum capacitor,
connected btw. Vcc and GND. This capacitor is charged from the Vs line thru a Schottky diode
to~4.5V.
Right before the AD conversion, my program commutes to the ADC input and waits S&H time.
The output voltage vs. supply voltage diagramm is remarkable flat, so here is room for
different conversion speeds.
I made a lot of tests with a 2m long line(2x,twisted,28AWG).I fund loss of accuracy
less then 1/LSB at 12bit resolution.
An 1nF decoupling capacitor reduces the input noise, however some dither is welcom.

My questions are :may I think about series production? Is here some hidden error in this
schema?It would be possible a future version of LMTxx which incorporates the limiting resistor
and the diode?