Dear Emmy,
Thank you for your kind answer.
I made a comparative measurement schema for relative accuracy determination, using the same MCU and DUT,
with an auxiliary port(directly to Vcc), and switching btw. 2-wire and 3-wire by soft.
Any offset and slope differences can be resolved by software.
Actually, I have a periodic short sequence of ..HiZ/+5V(10msec)/HiZ,wait/ADC1/wait/ADC2/wait/ADC3/HiZ..with
a period of 100msec.I am using 3 consecutive conversions for self-heating correction by
extrapolation (something like Keithley's Delta Method)
I am planning to play with this period,maybe I can obtain some 50/60Hz rejection.
The main problem with this 2-wire solution is the commutation noise,it exist an optimum
waiting time for de-ringing before the first ADC ; unfortunately this is line length dependent.
This is why I'm not very happy to increase the 1k resistor.
Better, I will make efforts to improve the thermal bridge btw.LMT86 and case.
The size of the capacitor is determined only by LMT86 supply current.In ADC state the diode is
reverse polarized,blocking the way from the capacitor to the resistor.
Iosif