Part Number: DAC3484EVM I'm driving the J9 CLKIN input with a 153.6MHz LVPECL20 output from an LMK04828B_EVM CLKout0+/-. I've reduced the emitter resistance to 120 Ohms an have managed to get a 600mV signal riding on the 2V bias of the Primary clock input to the on-board CDCE62005 IC. I think I need help getting this CDCE62005 chip to operate. Upon powering up, the FPGA clock outputs to the J13 connector has a signal outputting from U3P/N outputs (i.e. Y3:FPGACLK1 on the CDCE62006 tab of the DAC3484EVM Software Control tab) so I know that the DAC3484EVM is operational and I've even run it connected to a TSW1400 and seen that work. I'm obviously doing something wrong but I don't know what. The CLKout0+/- is connected to an ADC-WB-BB balun. With or without the R1/R3 resistors, I'm not getting much of a difference in signal amplitude. Attached below is my setup for both cards. The LMK04828B_EVM is operational, but the DAC3484EVM is not seeing my clock input signal and producing the desired 131.072MHz output on U3P/N. (Please visit the site to view this file) (Please visit the site to view this file)
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Forum Post: DAC3484EVM: CLKIN not working...
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Forum Post: RE: AFE7225EVM: Software and Connectivity/Interfacing.
Hey Harry, The AFE 7225 EVM GUI download has been restored. Access it in the Tools & Software section of the product page. Link is below: www.ti.com/.../toolssoftware Yusuf
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Forum Post: RE: Need Help in Selection of ADC for High speed image sensor
Hi Shyam, How are you? Also our group system engineer suggested please refer to ADS52J90 device. Thank you! Best regards, Chen
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Forum Post: ADS1298: Input Differential Dynamic Range
Part Number: ADS1298 I am uncertain as to how the 300mV value was achieved in the following equation If VREF is 2.4V and 2*Vref / Gain = Full-Scale Range = 2*2.4V/6 = 4.8/6 = .800V.
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Forum Post: ADS124S08EVM: DRDY/Dout
Part Number: ADS124S08EVM Is it necessary to connect DRDY pin to Arduino uno for doing SPI( ADS124S08 and Arduino uno)?
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Forum Post: ADS124S08EVM: ADS124S08
Part Number: ADS124S08EVM Can I give external power supply 5V from arduino to ADS124S08 EVM to power on instead of giving from USB to EVM?
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Forum Post: ADS9224R: Full production release date
Part Number: ADS9224R Hi, I'm considering using this device on a new design and would like to find out when the device status is scheduled to change from PREVIEW to ACTIVE. Best Regards Jacob
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Forum Post: ADS1248: ADS1248 GPIO Configuration
Part Number: ADS1248 Hi, I'm actually working on the ADS1248 ADC. For my application i need a high level on the pin 14 ( AIN5/GPIO5). The SPI work well, i can read/write registers but i have difficulties to setup the GPIO5 to output high level state. Here my procedure : - Reset the chip by pull down the reset pin during 10ms - Wait 1s - Pull start pin to high - Wait for DRDY falling edge - Send SDATAC cmd - Wait for DRDY falling edge - Write GPIOCFG to 0x20 (GPIO5 bit set to 1 to use the pin as a GPIO ) - Write GPIODIR to 0x00 (GPIO5 bit to 0 for output mode) - Write GPIODAT to 0x20 (GPIO5 bit to 1 for a high level) Bellow traces of the SPI communication. I think I forget something but I do not know what. Best regards Thomas SDATAC cmd : WREG
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Forum Post: ADS5401: Suitable Part
Part Number: ADS5401 Dear Team, The customer would like to use ADS5401 . The 12-Bit and 800-Msps is good for his design. But I am wondering do we have price competitive device? BR Kevin
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Forum Post: ADS8688: Input register
Part Number: ADS8688 Hi, My customer uses ADS8688 and LM35DZ (temp sensor). ADS8688 convert analog data from LM35DZ. Temperature slope of LM35 output is 10mV/ degree C from 0mV. When user connect the output of LM35 to ADC8688, the output of LM35 will not be under 0.1V at low temperature. Once he checks LM35 without connection to ADC8688, the output will be close to 0V at low temperature. I believe the output may clamped by ADS8688 input. Because Input of ADS8688 may have internal 1Mohms and OVP. But do you have idea how to release the clamp? I'm asking customer schematics but cannot show it in public E2E (this). So, is it possible to discuss this topic with e-mail? could you please let me know contact person? My address is s-nagata@ti.com. Regards, Nagata.
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Forum Post: DAC81416EVM: Initial value of the STATUS register
Part Number: DAC81416EVM Hi all, we have a DAC81416EVM board, and it is connected to our spi master. When we read the all readable registers after power-on, all the read values are matched to the initial values as described in the spec. except for the Status register (address 0x02). According to the spec. it should be 0000h, however the measured value is 8000h. The response of the MISO (in red) is shown as following: Is it normal? Thanks in advance! Best regards, Jianxiong
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Forum Post: RE: TSW1400EVM: Instruction for testing a TSW1400 EVM with an ADS5484 EVM
Hi Jim, It looks like the power supply 5V - 3A from my lab still works. Thank you so much for your info. I really appreciate it. Best reagrds, Thinh
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Forum Post: RE: ADS54J66EVM: ADS54J66
hi jim, 1.What is relation between 491 MSPS and 500 MSPS which i have highlighted in the below given table? 2.If i give a input clock frequency of 491.52Mhz and working in mode 8 then output data rate i'll be getting is 491 MSPS or 500 MSPS? thanks.
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Forum Post: RE: AFE5818: HPF or DC compensation distortion?
Hi, Nowhere in the datasheet does it state that the high-pass filter functions must be disabled for the specification in the datasheet to be valid, e.g. to work properly with 30 or 113 kHz signals. On the contrary, from the datasheet: Page 1: "Applications - Sonar imaging equipment" Page 33: "This broad analog frequency range enables the device to be used in both sonar and medical applications." Page 78: "In addition, the signal chain of the device can handle signal frequencies as low as 10 kHz and as high as 50 MHz. As a result of the device functionality, the device can be used in various applications (such as in medical ultrasound imaging systems, sonar imaging equipment, radar, and other systems that require a very large dynamic range)" This is not a trivial matter of just disabling the HPF. That is simply not a viable option in a real product that requires wide bandwidth and high dynamic range. Does this mean you are admitting that the AFE5818 is poorly or incorrectly designed and that you've failed in your verification? If this is true, you do understand that we will need to replace the AFE5818 at the cost of our customer? The datasheet is from 2015 and we have to drag this information out of you? This doesn't give us much confidence in choosing another ADC or other products from TI. Please advise. / Christer
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Forum Post: RE: ADS5400: Does the batch number of ADS5400 affect the output?
Hi Jay, I'm sorry for my late reply. Some of the silk prints on the chip are 02A1PLT and others are 02A1PNT. Please let me know if you need further information. Thank you. Regards, Amy
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Forum Post: RE: DAC38J84: Configuration of SERDES lines for quad channel conversion at 1228.2 MSPS
Hello Blaz, In JESD204B, the standard defines the duration of each octet (8 bits), frame size (F), and also multi-frame size (K). This is to ensure each vendors to have some sort of common design for the data interface regardless of the overall chip design. With 8b/10b encoding, each octet will be converted to 10bit 8b/10b encoded word. Since each lane is operating at 12288.8Mbps, you can calculate the octet rate (i.e. column rate, and hence calculating the data rate). The actual term to define the interface rate is LMFS or local multi-frame rate. You may visit our training site for more detail. https://training.ti.com/high-speed-signal-chain-university -Kang
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Forum Post: RE: DAC3484EVM: CLKIN not working...
Hello Ron, I recommend to first try to inject the J9 CLKIN clock source from an external test equipment to see if the connection to the J9 and also the J9 connector is properly soldered down to the EVM. There may be cases where the SMA connector center pin may not be making proper contact due to mechanical stress. Try to increase the J9 CLKIN power higher as described in the EVM user's guide to see if you can improve the situation. Perhaps you may touch up the soldering with soldering iron. If necessary, please contact your EVM supplier for an EVM replacement. You may also run the default setup script within the DAC3484 EVM GUI, which are known good test setup to eliminate variables of the clock chip configuration. The default scripts have setup for 1228.8MSPS of DAC and also 983.04MSPS of DAC with the CDCE62005 in clock distribution mode. If you want to set the CDCE62005 in PLL mode, we also have some configurations as well. For more advanced configuration of the CDCE62005 outside of the scope of the default EVM setup, we may have to refer you to the clocking forum for more assistance. They have more expertise in helping the advanced setup. -Kang
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Forum Post: RE: DAC81416EVM: Initial value of the STATUS register
Hi Jianxiong, Thank you for your query. The behavior is normal. Please mask the reserved bits in software when you are reading. Ideally, they should have been mentioned as 'don't care' in the datasheet. Hope that answers your question. Regards, Uttam Sahu Applications Engineer, Precision DACs
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Forum Post: ADS1120: Problem with compression near FS in negative measures.
Part Number: ADS1120 I use the ADS1120 to realize measures between ±20mA. The equipment has 8 cells with one ADS per cell. This cells are isolated between itself. In many of this cells the funcionality is Ok, the componente work well. But in the last production i see 6 componentes that have a compression mistake in negative measures, only, and near FS. One of the test is a curve for test the lineality of input. I put in the inputs, values between -20 and 20mA with 1mA of step. The table of results is: Input CH1 Dif-esl CH2 Dif-esl 0 0 -1 1 -818 818 -818 817 2 -1637 819 -1636 818 3 -2456 819 -2454 818 4 -3274 818 -3273 819 5 -4093 819 -4090 817 6 -4911 818 -4908 818 7 -5730 819 -5727 819 8 -6549 819 -6545 818 9 -7368 819 -7363 818 10 -8185 817 -8182 819 11 -9004 819 -8999 817 12 -9823 819 -9817 818 13 -10641 818 -10636 819 14 -11460 819 -11454 818 15 -12587 1127 -12577 1123 16 -13434 847 -13427 850 17 -14205 771 -14200 773 18 -14998 793 -14992 792 19 -15747 749 -15739 747 20 0 -15747 0 -15739 0 0 -1 1 819 819 819 820 2 1637 818 1637 818 3 2457 820 2455 818 4 3275 818 3274 819 5 4093 818 4091 817 6 4911 818 4910 819 7 5730 819 5727 817 8 6548 818 6545 818 9 7367 819 7363 818 10 8185 818 8181 818 11 9004 819 8999 818 12 9823 819 9818 819 13 10641 818 10636 818 14 11459 818 11453 817 15 12279 820 12272 819 16 13097 818 13090 818 17 13915 818 13908 818 18 14733 818 14726 818 19 15553 820 15544 818 20 16371 818 16363 819 Dif-Esl this tbale is de differencie between one step and the next step. If the lineality is ok, all steps would be identical and the part positive and negative would be like each other. This measure is of one of this cells, in the other cells the measure is ok, and the side positive and negative are identical. My question is about if this problem has seen any time? Or if this is a problem with these ADC's. The circuit of cell, if you want, i can send you.
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Forum Post: ADS1262EVM-PDK: ADCPro PGA1 Gain setting has no effect
Part Number: ADS1262EVM-PDK ADCpro (on Windows 10 computer) linked to ADS126xEVM Rev A Test DAC output is connected to AIN6/AIN7 - these outputs are wired into AIN0/AIN1. Pos. Test Signal Supply Ratio is 0.5, Neg Test Signal Supply ratio is 0.45 - Single supply of 5.00V - DAC output is 250mV. Input MUX ADC1 is selected as AIN0/AIN1 and PGA1 Gain is 1 (Bypass is disabled) - acquire gives me readings around 0.24935. All ok so far. However I get the same reading if i change the PGA1 Gain to 2 (or 4 etc.). On the Register Map MODE1 seems fixed at 0x80. Why am I unable to change the gain?? Regards Keith
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